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| M74HC165 8-bit PISO shift register Features High speed: - tPD = 15 ns (typ.) at VCC = 6 V Low power dissipation: - ICC = 4 A (max.) at TA = 25 C High noise immunity: VNIH = VNIL = 28 % VCC (Min.) Symmetrical output impedance: |IOH| = IOL = 4 mA (min) Balanced propagation delays: tPLH tPHL Wide operating voltage range: VCC (opr) = 2 V to 6 V Pin and function compatible with 74 series 165 TSSOP16 SO-16 DIP-16 Description The M74HC165 is a high speed CMOS 8-bit PISO (parallel-in-serial-out) shift register fabricated with silicon gate C2MOS technology. This device contains eight clocked master slave RS flip-flops connected as a shift register, with auxiliary gating to provide overriding asynchronous parallel entry. The parallel data enter when the shift/load input is low and can change while shift/load is low, provided that the recommended set-up and hold times are observed. For clocked operation, shift/load must be high. The two clock inputs perform identically: one can be used as a clock inhibit by applying a high signal, to allow this operation clocking is accomplished through a 2-input nor gate. To avoid double clocking, however, the inhibit signal should only go high while the clock is high. Otherwise the rising inhibit signal causes the same response as rising clock edge. All inputs are equipped with protection circuits against static discharge and transient excess voltage. Table 1. Device summary Order code M74HC165B1R M74HC165RM13TR M74HC165TTR Package DIP-16 SO-16 TSSOP16 Packaging Tube Tape and reel Tape and reel May 2008 Rev 5 1/21 www.st.com 21 Contents M74HC165 Contents 1 2 Logic symbols and I/O equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 2.2 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Logic states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 3.2 3.3 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Timing chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4.1 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 6 7 8 9 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2/21 M74HC165 Logic symbols and I/O equivalent circuit 1 Logic symbols and I/O equivalent circuit Figure 1. IEC logic symbols Figure 2. Input and output equivalent circuit 3/21 Pin settings M74HC165 2 2.1 Pin settings Pin connection Figure 3. Pin connection (top through view) 2.2 Pin description Table 2. Pin description Symbol SHIFT/LOAD CLOCK QH QH SI A to H CLOCK INH GND VCC Data inputs Clock input (low to high, edge triggered) Complementary output Serial output Serial input Parallel data inputs Clock inhibit Ground (0 V) Positive supply voltage Name and function Pin number 1 2 7 9 10 11, 12, 13, 14, 3, 4, 5, 6 15 8 16 4/21 M74HC165 Logic states 3 3.1 Logic states Truth table Table 3. Truth table Inputs Shift /Load L H H H H H H X H Clock INH X L L L L H X Clock X SI X H L H L X X A..........H a..........h X X X X X X Internal outputs QA a H L H L QB b QAn QAn QAn QAn No change No change Outputs QH h QGn QGn QGn QGn Note: a........h : the level of steady input voltage at inputs a through respectively QAn - QGn : the level of QA - QG, respectively. Before the most recent transition of the clock. 3.2 Logic diagram Figure 4. Logic diagram Note: This logic diagram has not to be used to estimate propagation delays 5/21 Logic states M74HC165 3.3 Timing chart Figure 5. Timing chart 6/21 M74HC165 Maximum rating 4 Maximum rating Stressing the device above the rating listed in the "absolute maximum ratings" table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. refer also to the STMicroelectronics sure program and other relevant quality documents. Table 4. Symbol VCC VI VO IIK IOK IO ICC or IGND PD Tstg TL Supply voltage DC input voltage DC output voltage DC input diode current DC output diode current DC output current DC VCC or ground current Power dissipation Storage temperature Lead temperature (10 sec) Absolute maximum ratings Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 20 20 25 50 500(1) -65 to +150 300 Unit V V V mA mA mA mA mW C C 1. (*) 500 mW at 65 C; derate to 300 mW by 10 mW/ C from 65 C to 85 C 4.1 Recommended operating conditions Table 5. Symsbol VCC VI VO Top Supply voltage Input voltage Output voltage Operating temperature VCC = 2.0 V tr, tf Input rise and fall time VCC = 4.5 V VCC = 6.0 V Recommended operating conditions Parameter Value 2 to 6 0 to VCC 0 to VCC -55 to 125 0 to 1000 0 to 500 0 to 400 Unit V V V C ns ns ns 7/21 Electrical characteristics M74HC165 5 Table 6. Electrical characteristics DC specifications Test condition Value TA = 25C Min Typ Max 1.5 3.15 4.2 0.5 1.35 1.8 IO = -20 A IO = -20 A IO = -20 A IO = -4.0 mA IO = -5.2 mA IO = 20 A IO = 20 A IO = 20 A IO = 4.0 mA IO = 5.2 mA 1.9 4.4 5.9 2.0 4.5 6.0 1.9 4.4 5.9 4.13 5.63 0.1 0.1 0.1 0.1 0.1 0.1 0.33 0.33 1 40 -40 to 85C -55 to 125C Unit Min 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.10 5.60 0.1 0.1 0.1 0.40 0.40 1 80 A A V V Max Min 1.5 3.15 4.2 0.5 1.35 1.8 V V Max Symbol Parameter VCC (V) 2.0 VIH High level input voltage 4.5 6.0 2.0 VIL Low level input voltage 4.5 6.0 2.0 4.5 VOH High level output voltage 6.0 4.5 6.0 2.0 4.5 4.18 4.31 5.68 5.8 0.0 0.0 0.0 VOL Low level output voltage 6.0 4.5 6.0 0.17 0.26 0.18 0.26 0.1 4 II ICC Input leakage current Quiescent supply current 6.0 VI = VCC or GND 6.0 VI = VCC or GND 8/21 M74HC165 Electrical characteristics Table 7. AC electrical characteristics (CL = 50 pF, Input tr = tf = 6ns) Test condition Value TA = 25C Min Typ 30 8 7 55 18 15 65 21 18 52 17 14 7.4 37 44 15 60 71 24 6 5 32 8 7 24 6 5 75 15 13 75 15 13 75 15 13 0 0 0 20 5 4 75 15 13 Max 75 15 13 150 30 26 165 33 28 135 27 23 6.0 30 35 95 19 16 95 19 16 95 19 16 0 0 0 95 19 16 -40 to 85C Min Max 95 19 16 190 38 33 205 41 35 170 34 29 4.8 24 28 110 22 19 110 22 19 110 22 ns 6.0 2.0 4.5 6.0 2.0 4.5 6.0 19 0 0 0 110 22 19 ns ns ns ns MHz 250 50 43 205 41 35 ns ns -55 to 125C Min Max 110 22 19 225 45 38 ns ns Unit Symbol Parameter VCC (V) 2.0 Output transition tTLH tTHL time 4.5 6.0 Propagation delay tPLH tPHL time (CLOCK - QH, QH) Propagation delay time tPLH tPHL (SHIFT/LOAD QH, QH) Propagation delay tPLH tPHL time (H - QH, QH) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 fMAX Maximum clock frequency 4.5 6.0 tW(H) tW(L) Minimum pulse width (CLOCK) Minimum pulse width (SHIFT/LOAD) Minimum set-up time (PI - SHIFT/LOAD) (SI - CLOCK) (SHIFT/LOAD CK) Minimum hold time (PI - SHIFT/LOAD) (SI - CLOCK) (SHIFT/LOAD CK) Minimum removal time (CLOCK - CK INH) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 tW(L) ts th tREM 9/21 Electrical characteristics M74HC165 Table 8. Capacitive characteristics Test condition Value TA = 25 C Min Typ 5 55 Max 10 -40 to 85 C Min Max 10 -55 to 125 C Min Max 10 pF pF Unit Symbol Parameter VCC (V) 5.0 5.0 CIN CPD Input capacitance Power dissipation capacitance (1) 1. CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC 10/21 M74HC165 Test circuit 6 Test circuit Figure 6. Test circuit CL = 50 pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50) 11/21 Waveforms M74HC165 7 Waveforms Figure 7. Serial mode propagation delay (f = 1 MHz; 50% duty cycle) Figure 8. Parallel mode propagation delay (f = 1 MHz; 50% duty cycle) 12/21 M74HC165 Figure 9. Minimum pulse width (S/L), propagation delay times (f = 1 MHz; 50% duty cycle) Waveforms Figure 10. Setup and hold time (PI to S/L) (f = 1 MHz; 50% duty cycle) Figure 11. Minimum removal time (CK INH to CK) (f = 1 MHz; 50% duty cycle) 13/21 Package mechanical data M74HC165 8 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 14/21 M74HC165 Package mechanical data Plastic DIP-16 (0.25) MECHANICAL DATA mm. DIM. MIN. a1 B b b1 D E e e3 F I L Z 3.3 1.27 8.5 2.54 17.78 7.1 5.1 0.130 0.050 0.51 0.77 0.5 0.25 20 0.335 0.100 0.700 0.280 0.201 1.65 TYP MAX. MIN. 0.020 0.030 0.020 0.010 0.787 0.065 TYP. MAX. inch P001C 15/21 Package mechanical data M74HC165 SO-16 MECHANICAL DATA DIM. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 9.8 5.8 1.27 8.89 4.0 5.3 1.27 0.62 8 (max.) 0.149 0.181 0.019 10 6.2 0.35 0.19 0.5 45 (typ.) 0.385 0.228 0.050 0.350 0.157 0.208 0.050 0.024 0.393 0.244 0.1 mm. MIN. TYP MAX. 1.75 0.25 1.64 0.46 0.25 0.013 0.007 0.019 0.004 MIN. inch TYP. MAX. 0.068 0.010 0.063 0.018 0.010 0016020D 16/21 M74HC165 Package mechanical data TSSOP16 MECHANICAL DATA mm. DIM. MIN. A A1 A2 b c D E E1 e K L 0 0.45 0.60 0.05 0.8 0.19 0.09 4.9 6.2 4.3 5 6.4 4.4 0.65 BSC 8 0.75 0 0.018 0.024 1 TYP MAX. 1.2 0.15 1.05 0.30 0.20 5.1 6.6 4.48 0.002 0.031 0.007 0.004 0.193 0.244 0.169 0.197 0.252 0.173 0.0256 BSC 8 0.030 0.004 0.039 MIN. TYP. MAX. 0.047 0.006 0.041 0.012 0.0079 0.201 0.260 0.176 inch A A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080338D 17/21 Package mechanical data M74HC165 Tape & Reel SO-16 MECHANICAL DATA mm. DIM. MIN. A C D N T Ao Bo Ko Po P 6.45 10.3 2.1 3.9 7.9 12.8 20.2 60 22.4 6.65 10.5 2.3 4.1 8.1 0.254 0.406 0.082 0.153 0.311 TYP MAX. 330 13.2 0.504 0.795 2.362 0.882 0.262 0.414 0.090 0.161 0.319 MIN. TYP. MAX. 12.992 0.519 inch 18/21 M74HC165 Package mechanical data Tape & Reel SSOP16 MECHANICAL DATA mm. DIM. MIN. A C D N T Ao Bo Ko Po P 8.4 6.7 2.9 3.9 11.9 12.8 20.2 60 22.4 8.6 6.9 3.1 4.1 12.1 0.331 0.264 0.114 0.153 0.468 TYP MAX. 330 13.2 0.504 0.795 2.362 0.882 0.339 0.272 0.122 0.161 0.476 MIN. TYP. MAX. 12.992 0.519 inch 19/21 Revision history M74HC165 9 Revision history Table 9. Date 9-Jul-2001 21-Mar-2007 26-May-2008 Document revision history Revision 3 4 5 Final release. The document has been reformatted, updated Table 2: Pin description on page 4 Removed: M74HC165M1R order code. Minor changes in the text. Added: SO-16 and TSSOP16 tape and reel specifications. Changes 20/21 M74HC165 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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